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High Speed RTL Design Engineer

8213 Avago Technologies U.S. Inc.
San Jose, CA Full Time
POSTED ON 10/11/2024 CLOSED ON 11/5/2024

What are the responsibilities and job description for the High Speed RTL Design Engineer position at 8213 Avago Technologies U.S. Inc.?

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Job Description:

High Speed RTL Design Engineer

 Qualifications include:

  • MS or PhD in Electrical Engineering or Computer Engineering with 10 years of experience in RTL design. 

  • Proficient with Verilog-HDL/System Verilog coding.

  • Proficient with front end tools such as NCVerilog, NCSIM, Simvision, Lint.

  • Exposure to Design for test, understanding of scan concept and writing DFT friendly RTL.

  • Deep understanding of high-speed serial interconnect architectures such as 100G/200G per lane PAM4 and design trade-offs to drive attainment on metrics such as performance, power, and cost over the project lifetime.

  • Experience in synthesis, CDC, static timing analysis.

  • Exposure to SDF annotated simulations with good understanding of parasitic delays.

  • Experience in design management with detailed knowledge of development methodologies, design flows including EDA integration, foundry PDK and associated collaterals.

  • Strong analytical thinking and problem-solving skills with excellent attention to details.

  • Must be organized, self-motivated and able to work effectively across internal and end customers teams.

  • Must have excellent knowledge/experience with TSMC 7nm-2nm, i.e. understanding of power consumptions, area, estimated design and layout efforts for digital and analog blocks, technology limitations.

Highly Desired Qualifications:

- Understanding of micro architecture with standard peripherals such as AMBA BUS/I2C/SPI/UART.

- Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs.

- Understanding & exposure to verilog AMS simulation, experience in behavioral models of analog circuit will be helpful.

- Willing to work in a multifunctional role.

- Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels. 

- Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. 

- Excellent time and task management, and interpersonal skills.  

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $141,000 - $225,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Salary : $141,000 - $225,000

Principal Circuit Design Engineer (High Speed IO)
Ampere -
Santa Clara, CA

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