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Custom ERC/Power-Intent Automation CAD Engineer

Apple
San Francisco, CA Full Time
POSTED ON 1/28/2026 CLOSED ON 2/26/2026

What are the responsibilities and job description for the Custom ERC/Power-Intent Automation CAD Engineer position at Apple?

Summary

Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices!

As a member of our CAD team, you will architect, dictate, develop, maintain and enhance custom analog power intent methodology and circuit ERC solutions for our Analog, RF and mixed-signal designs. The role requires you to work with different technology nodes and provide flows/methodologies for the different tool sets.

Description

In this highly visible role, your primary responsibilities will include:

  • Developing innovative solutions on Circuit ERC (Electric Rules checks) or Power Intent analysis leveraging expertise on circuits and programming.
  • Actively involving yourself in supporting ERC/Power Intent on voltage domain interactions like – supply gating mechanisms, isolation controls, level shifting, switch supplies, virtual domain interactions, power integrity etc.
  • Closely collaborating with diverse design teams, including Custom Analog, Mixed-Signal, Digital, RF and more, to understand their needs and requirements on circuit ERC and power flows. Applying advanced techniques to address these requirements across multiple products and reduce duplicate design work.
  • Working in tandem with other domain in CAD, Power, Technology teams to validate their ML-based applications, implement enhancements, and evaluate external vendor packages and solutions from EDA (Electronic Design Automation) providers and open-source.

Minimum Qualifications

  • Programming/scripting skills in Perl, Python, TCL, SKILL language, C or Shell.
  • Minimum requirement of BS degree.

Preferred Qualifications

  • Exposure to custom Schematic/Layout tracing via SPICE/Open Access, power gating techniques, biasing, circuit topologies (power switches, level-shifter, iso), virtual/derived/multi-power domains, standard-cells would be helpful.
  • Exposure to SVRF, TCL, Liberty/.lib, UPF - IEEE1801, CPF formats.
  • Exposure to industry low power tools, Siemens Calibre PERC; Cadence Conformal LEC, Virtuoso Power Manager, Innovus; Synopsys Library compiler, VCLP, Low Power verification is desirable.
  • Background in SPICE simulation, SOA, device operating conditions, and knowledge of Post-layout extraction is a plus.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Apple accepts applications to this posting on an ongoing basis.

Salary.com Estimation for Custom ERC/Power-Intent Automation CAD Engineer in San Francisco, CA
$88,778 to $110,397
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